About the Role
Job Summary
Reporting to the Memory Validation leadership team, the Staff Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms.
The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust mem
Company
Graphcore →Job Details
- Location
- Bengaluru, India
- Work Type
- On-site / Hybrid
- Posted
- 4 weeks ago